The present invention relates in general to semiconductor devices and, more particularly, to vertical gate transistors.
There is a continuing demand for semiconductor devices with a higher level of performance and a lower manufacturing cost. For example, manufacturers of switching regulators are demanding mote efficient power MOSFET transistors for switching the inductor currents that develop the regulated output voltages. Higher efficiency is achieved by utilizing transistors with shorter channels to provide a higher frequency response that reduces the switching losses of the regulator.
However, most if not all previous high frequency power transistors require advanced photolithographic equipment capable of resolving small feature sizes in order to provide the shorter length channels necessary to reduce switching losses. Some previous high frequency transistors are formed with vertical gate structures in which the channel lengths are defined by the thickness of the deposited gate electrode rather than a feature size of a photolithographic tool. This approach reduces the need for expensive photolithographic equipment, which reduces the cost of building the devices. However, previous vertical gate devices require numerous masking steps and a complex sequence of processing steps, which reduces the die yield and increases the manufacturing cost of the devices.
Hence, there is a need for a semiconductor device with a short channel to operate at a high frequency and efficiency, and which can be made with a simple sequence of processing steps to avoid the need for expensive manufacturing equipment.